Cap attach surface modification for improved adhesion

ABSTRACT

An electronic structure bondable to an electronic assembly, such as a chip. The electronic structure may be joined to a electronic assembly, such as a chip, by use of a structural epoxy adhesive. The electronic structure includes a mineral layer on a metallic plate, and an adhesion promoter layer on the mineral layer. The metallic plate includes a metallic substance that includes a pure metal with or without a metal coating. The metallic substance may include such substances as stainless steel, aluminum, titanium, copper, copper coated with nickel, and copper coated with chrome. The mineral layer includes a chemical compound derived from a mineral; e.g., silicon dioxide (SiO 2 ) derived from quartz. Such chemical compounds may include such substances as silicon dioxide, silicon nitride, and silicon carbide. The chemical compound may exist in either crystalline or amorphous form. The adhesion promoter may include such chemical substances as silanes, titanates, zirconates, and aluminates.

BACKGROUND OF THE INVENTION

[0001] 1. Technical Field

[0002] The present invention relates to a structure, and associated method of formation, in which a metal plate is surface treated to facilitate adhesive bonding to the metal plate.

[0003] 2. Related Art

[0004] In an electronic structure, bonding of an electronic assembly (such as a chip) to an electronic carrier (such as a chip carrier or circuit card) is typically characterized by a mismatch in thermal expansion coefficient (CTE) between the electronic assembly and the electronic carrier. As an example, a silicon chip may be adhesively coupled to an organic chip carrier by controlled collapse chip connection (C4) solder balls such that a thermally-cured rigid thermoset material encapsulates the C4 solder balls and mechanically couples the chip to the chip carrier. A silicon chip has a CTE typically in the range of 2 to 3 ppm/° C., while an organic chip carrier has a CTE typically in the range of 17 to 18 ppm/° C. With the organic chip carrier expanding and contracting thermally more than the chip, the mechanically coupled configuration responds to a temperature decrease from the cure temperature (e.g., 130° C.) of the rigid thermoset material by having the organic chip carrier bend concave downward in the direction away from the chip, thereby creating the shape of a “frown” in the chip carrier. Since the chip carrier may have a ball grid array (BGA) on its bottom side for attaching the chip carrier to a circuit card, the chip carrier's downward concavity represents a deviation from planarity that places stresses on the solder balls of the BGA. Such stresses may distort the shape of the BGA solder balls and subject the BGA solder balls to premature fatigue failure from thermal cycling.

[0005] A method currently employed to mitigate the aforementioned CTE mismatch problem utilizes a metallic plate (or cap), such as a stainless steel plate, placed in adhesive contact with both the top surface of the electronic assembly (e.g., chip) and the top surface of the electronic carrier (e.g., chip carrier). The adhesive contact may be accomplished by use of a thermally-cured structural adhesive. The arrangement of this method depends on using a metallic plate whose CTE mismatch with the electronic assembly is not very different from the CTE mismatch between the electronic assembly and the electronic carrier. For example, a stainless steel plate having a CTE of about 17 ppm/° C. may be placed in adhesive contact with a silicon chip having a CTE of about 2 to 3 ppm/° C. With the stainless steel plate thermally contracting and expanding more than the chip, the configuration responds to a temperature decrease from the cure temperature (e.g., 13° C.) of the structural adhesive by having the plate bend concave upward in the direction away from the chip, thereby creating the shape of a “smile” in the plate. The mechanical coupling between the plate and the chip, in concert with the mechanical coupling between the chip and the chip carrier, couples the thermal stresses in the plate to the chip carrier. As a result, the chip carrier is subject to oppositely directed stresses of comparable magnitude, namely the stress associated with the smile and the stress associated with the frown. These oppositely directed stresses cancel, leaving the chip carrier in a nearly planar (rather than curved) configuration. Due to the cancellation of opposing stresses, the resulting configuration is like a loaded spring that can “pop” if the plate should separate from the chip. Thus, the adhesion between the metallic plate and the electronic carrier (e.g., chip) must be strong and durable.

[0006] Direct adhesive bonding between a stainless steel plate and a silicon chip is not easily accomplished. A current method for facilitating adhesion between a stainless steel plate and a silicon chip includes: chemically cleaning organic debris from the plate surfaces, etching away a thin layer of stainless steel from a surface of the plate to increase surface roughness and promote subsequent adhesion, and adding a layer of an adhesion promoter, such as a silane, to the etched stainless steel surface. Then, the plate is adhesively bonded to both the chip and the chip carrier by use of a structural epoxy adhesive. Unfortunately, the aforementioned method of adhesive bonding does not reliably produce consistent results. In particular, the adhesion promoter leaves gaps in its coverage of the etched stainless steel surface. Additionally, the strength of the chemical bond between the adhesion promoter and the stainless steel surface diminishes with time. As a result, the plate may prematurely delaminate from the epoxy adhesive.

[0007] A method is needed for providing strong and durable adhesive coupling between a metallic cap and an electronic carrier.

SUMMARY OF THE INVENTION

[0008] The present invention provides an electronic structure, comprising: a metallic plate; a mineral layer bonded to the metallic plate; and an adhesion promoter layer bonded to the mineral layer.

[0009] The present invention also provides a method for forming an electronic structure, comprising: providing a metallic plate; forming a mineral layer on the metallic plate; and forming an adhesion promoter layer on the mineral layer.

[0010] The present invention has the advantage of providing a strong adhesive bond between a metallic plate and an electronic assembly. The present invention advantageously facilitates consistent and uniform coverage of the metallic plate by the adhesion promoter. The present invention has the added advantage of providing a mechanism for dissipating heat from an electronic assembly.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011]FIG. 1 depicts a side cross-sectional view of a metallic plate, in accordance with a preferred embodiment of the present invention.

[0012]FIG. 2 depicts FIG. 1 with an added mineral layer.

[0013]FIG. 3 depicts a sputtering deposition chamber, in accordance with the preferred embodiment.

[0014]FIG. 4 depicts FIG. 2 with an added adhesion promoter layer.

[0015]FIG. 5 depicts FIG. 4 with the metallic plate adhesively coupled to an electronic assembly and to an electronic carrier.

[0016]FIG. 6 depicts the configuration of a wedge test.

DETAILED DESCRIPTION OF THE DRAWINGS

[0017]FIG. 1 illustrates a side cross-sectional view of a metallic plate 10 having a top surface 12 and an edge surface 14. The top surface 12 and the edge surface 14 meet at a comer 16. The metallic plate 10 includes a metallic substance that includes a metal with or without a metal coating. The metallic substance may include, inter alia, stainless steel, aluminum, titanium, copper, copper coated with nickel, and copper coated with chrome. The presence of metal in the metallic substance enables the metallic plate 10 to have sufficiently high thermal conductivity for effectively conducting heat out of an electronic assembly, such as a chip, that will be subsequently bonded to the plate. The metallic plate of the structure of the present invention may have any thickness consistent with both the elastic modulus of the metallic substance and the thickness of the electronic carrier (e.g., laminate chip carrier) to which the metallic plate 10 will subsequently be coupled (see FIG. 5 showing the metallic plate 10 coupled to the electronic carrier 60). The elastic modulus of the metallic substance and the thickness of the electronic carrier both relate to the force-balancing effectiveness of the metallic plate, as discussed supra in the “Related Art” section. For a stainless steel plate and a laminate chip carrier having a thickness between about 25 mils and about 35 mils, a plate thickness in a range of about 5 mils to about 7 mils is preferred. A plate thickness in a range of about 2 mils to about 20 mils is generally acceptable, depending on the elastic modulus of the metallic substance and the thickness of the electronic carrier.

[0018] It is preferred to initially clean the top surface 12, and the edge surface 14, of the metallic plate 10 in the following two steps. The first step chemically cleans the top surface 12 and the edge surface 14 to remove organic debris, such as oil. The second step sputter etches the top surface 12 and the edge surface 14 to remove a layer of the top surface 12 and the edge surface 14, respectively. While there are no inherent limitations on the thickness of the removed layers, tests have been conducted with sputter etching of stainless steel plates with removal thicknesses in a range of about 50 Å to about 1000 Å. Any known method of sputter etching may be used, such as sputter etching in a low-pressure chamber (e.g., 2×10⁻⁴ psi) by directing a high-energy argon gas onto the top surface 12 and the edge surface 14 as the metallic plate 10 moves through the chamber on a conveyer belt. Alternatively, the metallic plate 10 may remain in a fixed position in the operating chamber for a predetermined time. The low pressure serves to eliminate airborne impurities from the chamber. After the two preceding cleaning steps, the top surface 12 and the edge surface 14 of the metallic plate 10 are ready for additional surface treatment.

[0019]FIG. 2 illustrates FIG. 1 after a mineral layer 20 is formed on the top surface 12, and on the edge surface 14, of the metallic plate 10. The mineral layer 20 includes a chemical compound derived from a mineral; e.g., silicon dioxide (SiO₂) derived from quartz. Such chemical compounds include, inter alia, silicon dioxide, silicon nitride, and silicon carbide. The chemical compound may exist in either crystalline or amorphous form. The mineral layer 20 has a bottom surface 22 that is bonded to the top surface 12, and the edge surface 14, of the metallic plate 10. A top surface 24 of the mineral layer 20 is exposed.

[0020] It is within the scope of the present invention to have embodiments in which the mineral layer 20 covers the entire top surface 12, or a portion of the top surface 12, without covering any portion of the edge surface 14. Nonetheless, it is preferred that the mineral layer 20 cover the entire top surface 12 as well as the edge surface 14, as shown in FIG. 2. With the mineral layer 20 covering the entire top surface 12, the additional coverage of the edge surface 14 prevents a high concentration of stress at the corner 16 of the metallic plate 10 when the metallic plate 10 is subsequently adhesively coupled to an electronic carrier.

[0021] Any known process may be used to form the mineral layer 20 on the metallic plate 10. FIG. 3 illustrates such a process, namely the process of sputter deposition of mineral molecules 170, such as SiO₂, on the top surface 12 of the metallic plate 10, as well as on the edge surface 14 of the metallic plate 10. FIG. 3 shows a simplified sputter deposition chamber 100 with an enclosure 110. The sputter deposition chamber 100 illustrated in FIG. 3 includes a target of quartz 140, which serves as a source of SiO₂ molecules. Initially, the sputter deposition chamber 100 is evacuated to remove impurities. A gas inlet 150 allows an argon (Ar) gas 160 (or other applicable gas such as O₂) to pass into the sputter deposition chamber 100. The argon gas 160 is ionized and accelerated by processes induced by negative voltage source 200, such that energetic argon ions strike the quartz target 140, causing SiO₂ molecules 170 to be dislodged and ejected from the quartz target 140 and then deposited on the top surface 12 of the metallic plate 10. The metallic plate 10 moves through the sputtering deposition chamber 100 on a conveyor belt 120 in the direction 130. Alternatively, the conveyor belt 120 could represent a stationary platform such that the sputtering deposition process is turned off after a predetermined period of time.

[0022] The sputtering deposition process should be adjusted to deposit a mineral layer having a minimum layer thickness of about 50 Å to ensure continuous coverage of the top surface 12, and of the edge surface 14, of the metallic plate 10. The maximum thickness of the mineral layer depends on molecular structural properties of the pertinent chemical compound in the mineral layer. For example, a mineral layer thickness of up to about 2000 Å protects the structural integrity of a quartz layer containing crystalline SiO₂. A quartz layer thickness between about 100 Å and about 1000 Å is preferred for reasons of conservatism.

[0023]FIG. 4 illustrates FIG. 2 after treatment with an adhesion promoter, such as a silane, to 20 form an adhesion promoter layer 30 on the mineral layer 20. The lower surface 32 of the adhesion promoter layer 30 is bonded to the upper surface 24 of the mineral layer 20. The adhesion promoter layer 30 may be formed with an approximately uniform thickness by any process known in the art. For example, the SiO₂-covered metallic plate 10 may be dipped in a silane solution, followed by dripping off excess solution and drying for several minutes at a moderate temperature (e.g., drying for 15 to 20 minutes at 80 to 100° C.). The adhesion promoter layer 30 should be thin enough to promote good adhesion with a subsequently applied structural adhesive. In particular, the thickness of the adhesion promoter layer 30 should be between 1 and about 50 monolayers. The adhesion promoter may include, inter alia, any silane adhesion promoter. See Plueddemann, “Silane Coupling Agents,” Plenum Press, 1982. For example, the applicable classes of silane adhesion promoters include: Class Example E—P—Si—(OCH₃)₃ 3-glycidoxypropyltrimethoxysilane E—P—Si—(OC₂H₅)₃ 3-glycidoxypropyltriethoxysilane A—P—Si—(OCH₃)₃ 3-(2-aminoethyl)propyltrimethoxysilane A—P—Si—(OC₂H₅)₃ 3-(2-aminoethyl)propyltriethoxysilane

[0024] where P stands for a propyl group, E stands for an epoxy group, and A stands for an amino group. The choice of an E or A in the preceding silane classes impacts the conditions under which the silane reacts when placed in contact with a structural epoxy material (see infra discussion of FIG. 5 concerning use of a structural epoxy adhesive for bonding the metallic plate of the present invention with an electronic assembly such as a chip). For example, the glycidoxy group will react with a curing agent in the structural epoxy material so that an elevated temperature may be required to drive the reaction, depending on the properties of the curing agent. In contrast, the aminoethyl group is itself a curing agent which will react with epoxy material at room temperature. Additional adhesion promoters which may be used for the present invention include titanates, zirconates, and aluminates.

[0025] The presence of the mineral layer 20 between the metallic plate 10 and the adhesion promoter layer 30 facilitates strong chemical coupling of the adhesion promoter layer 30 to the metallic plate 10. With the related art, there is no intervening mineral layer. Thus, in the related art, an adhesion promoter (e.g., a silane) is formed directly on a metallic plate (e.g., a stainless steel plate) with a chemical bond having a strong ionic character between the metallic plate and the adhesion promoter. Such chemical bonding is subject to hydrolysis and is therefore weak in the presence of moisture. With the mineral layer 20 of the-present invention, however, covalent bonding exists between the mineral layer 20 and the added adhesion promoter, such as between SiO₂ and silane. Such covalent bonding is moisture resistant. Thus, the structure of the present invention is not subject to degradation in the presence of moisture.

[0026]FIG. 5 illustrates FIG. 4 after the metallic plate 10 is adhesively coupled to an electronic assembly-carrier configuration, comprising an electronic assembly coupled to an electronic carrier, such as the module 80. The module 80 includes a chip 50 and a chip carrier 60, wherein the chip 50 is electrically coupled to the chip carrier 60 by C4 solder balls 55. A rigid thermoset encapsulating material 58 provides strong mechanical coupling between the chip 50 and the chip carrier 60. A ball grid array 66 at the bottom surface 64 of the chip carrier 60 facilitates subsequent attachment of the module 80 to a second electronic carrier such as a circuit card. The metallic plate 10 is adhesively coupled to the module 80 by the adhesive structure 40 which couples the top surface 34 of the adhesion promoter layer 30 to the top surface 52 of the chip 50 and to the top surface 62 of the chip carrier 60. Such adhesive coupling may be accomplished by any known process. An applicable process includes using a structural epoxy adhesive to accomplish the adhesive bonding, after surface treating with silane both the top surface 52 of the chip 50 and the top surface 62 of the chip carrier 60. The structural epoxy adhesive becomes, after curing, the adhesive structure 40.

[0027] The effectiveness of the mineral layer for promoting adhesion between a stainless steel plate and an applied epoxy adhesive was demonstrated by a wedge test. A pre-test phase was initiated by chemically treating a 7-mil thick stainless steel plate to remove organic contaminants. A layer of stainless steel was then removed from the plate by radio-frequency etching, using a high-energy argon gas in a low-pressure (about 2×10⁴ psi) etch chamber. The removed layer thickness varied between about 300 Å and about 800 Å. The preceding chemical cleaning and etching steps served to provide a clean and bondable surface on the stainless steel plate. Next, a uniform layer of SiO₂ was sputter deposited on the clean surface of the stainless steel plate by using argon gas in a sputtering deposition chamber while moving the plate on a conveyor belt through the chamber at constant velocity. The thickness of the SiO₂ layer was varied between about 300 Å and about 600 Å. After being cooled to about 100° C. by circulating nitrogen gas, the plate was dipped into a dilute solution (i.e., less than 2%).of either the silane 3-glycidoxypropyltrimethoxysilane or the silane 3-(2-aminoethyl)propyltrimethoxysilane. Excess silane was dripped off and the adherent silane was bake-dried in a chamber at 80 to 90° C. for about 15 to 20 minutes. The resultant plate, after the aforementioned pre-test treatment, will be referred to as a “test plate.” “Control test plates” were also generated in the same manner as described above with omission of the SiO₂ sputter deposition step.

[0028] In the-wedge test, as depicted in FIG. 6, a first test plate 300 was mechanically bonded to a second test plate 320 in a sandwich, using an interfacing adhesive layer 340 that included a structural adhesive, resulting in a bonded configuration 350. The first test plate 300 and second test plate 320 each had a thickness (t) of about 7 mils and were separated in the bonded configuration by a gap size (g) of about 4 mils. After the epoxy adhesive 340 was cured, a wedge plate 360, having a thickness (T) of about 12 mils, was inserted as a wedge between the first test plate 300 and the second test plate 320 and stressed the interfacial bonding between the first test plate 300 and the second test plate 320 by generating a crack opening energy of about 50 Joules/m². Under the stress due to the wedge plate 360, the bonded configuration 350 was aged for 24 hours at a temperature of 70° C. and a relative humidity of 60%, in order to simulate and accelerate the effects of realistic thermal loads that ordinarily occur in operating electronic packages. Next, the wedge plate 360 was removed and the interfacing adhesive layer 340 of the bonded configuration 350 was subjected stresses that included the combined effects of excessive moisture, mechanical stress, thermal cycling, and vapor pressure. The preceding stresses were generated in three sequential steps: a baking step, a soaking step, and a heating step. In the baking step, the bonded configuration 350 was baked at a temperature of 125° C. for 24 hours in order to drive moisture out of the bonded configuration 350. In the soaking step, the bonded configuration 350 was subjected to a relative humidity of 85% at a temperature of 85° C. The excess moisture tends to penetrate and soften the interfacing adhesive layer 340. In the heating step, the wedge plate 360 was reinserted, so as to introduce mechanical stress at a crack opening energy of about 3 Joules/m², followed by three successive heating cycles. In each heating cycle, the bonded configuration 350 was heated to an elevated temperature exceeding 200° C., maintained at the elevated temperature for about one minute, and cooled to ambient room temperature after removal from the heat source. The heating cycles stressed the adhesive bonding in the bonded configuration 350 by increasing the CTE, and decreasing the elastic modulus, of the adhesive. The heating cycles also vaporized excess moisture within the interfacing adhesive layer 340, thereby creating a vapor pressure that further stressed the interfacing adhesive layer 340.

[0029] A “peeling” step was used to test the resulting strength of the interfacing adhesive layer 340 after application of the preceding stresses. In particular, force was applied to the wedge plate 360 to move the wedge plate 360 in the direction 380 toward the interfacing adhesive layer 340 until the first test plate 300 and the second test plate 320 separated. The surfaces of the first test plate 300 and the second test plate 320 were examined to determine the percentage (P) of the adhesive-covered area of a given test plate (300 or 320) that became adhesive free upon separation from the other test plate. The test “failed” if P exceeded 30% for at least one of the first test plate 300 and the second test plate 320; otherwise the test “passed.” When the test was performed 4 times with 4 identical samples each time, and regular test plates (i.e., SiO₂ layer present) were used, the test always passed. Indeed, P was 0% for each sample, regardless of which silane (3-glycidoxypropyltrimethoxysilane or 3-(2-aminoethyl)propyltrimethoxysilane) was used. In contrast, when the control test was performed 7 times with 4 identical samples each time, using control test plates (i.e., no SiO₂ layer present), the test always failed when 3-glycidoxypropyltrimethoxysilane was used and failed about 50% of the time when 3-(2-aminoethyl)propyltrimethoxysilane was used. Thus, the preceding wedge test results demonstrate the effectiveness of the mineral layer (e.g., SiO₂ layer) of the present invention for promoting and maintaining strong adhesive bonding with a silane-treated metallic plate.

[0030] It is also noteworthy that the epoxy bond associated with the present invention was able to withstand a tensile stress of up to about 10,000 psi in another test, namely a stud pull test. In the stud pull test, the head of a stud was bonded with a test plate, using an epoxy adhesive. Tensile stresses of increasing magnitude were applied in an attempt to pull the stud away from the test plate, until the stud separated from the test plate. The test was performed for 24 test plates, corresponding to the etch thicknesses and sputter deposit thicknesses associated with test runs 1-6 in the preceding table and with 4 samples for each test run. The amount of tensile stress required to effectuate the stud separation varied from 9380 psi to 11120 psi for the 24 test plates. Of particular significance is that for all 24 test plates, the epoxy layer was fractured at the onset of stud separation and the SiO₂ layer was left intact.

[0031] While preferred and particular embodiments of the present invention have been described herein for purposes of illustration, many modifications and changes will become apparent to those skilled in the art. Accordingly, the appended claims are intended to encompass all such modifications and changes as fall within the true spirit and scope of this invention. 

1-19. (Canceled)
 20. A method for forming an electronic structure, comprising: providing a metallic plate such that all exterior surfaces of the metallic plate are exposed to an ambient atmosphere; forming a mineral layer on the metallic plate after the step of providing a metallic plate is performed; forming an adhesion promoter layer on the mineral layer after the step of forming a mineral layer is performed providing a semiconductor chip; providing an adhesive material; coupling the metallic plate to the semiconductor chip by interfacing the adhesive material between the adhesion promoter layer and the semiconductor chip; providing a chip carrier; coupling the semiconductor chip to the chip carrier; and coupling the metallic plate to the chip carrier by interfacing the adhesive material between the adhesion promoter layer and the chip carrier.
 21. The method of claim 20, wherein forming the mineral layer on the metallic plate comprises forming a first portion of the mineral layer on a first surface of the metallic plate and forming a second portion of the mineral layer on a second surface of the metallic plate, and wherein the first surface of the metallic plate is about perpendicular to the second surface of the metallic plate.
 22. The method of claim 21, wherein forming the adhesion promoter layer on the mineral layer comprises forming a first portion of the adhesion promoter layer on the first portion of the mineral layer and forming a second portion of the adhesion promoter layer on the second portion of the mineral layer.
 23. The method of claim 20, wherein forming the mineral layer includes forming the mineral layer having a mineral selected from the group consisting of silicon dioxide, silicon nitride, and silicon carbide.
 24. The method of claim 20, wherein forming the mineral layer includes forming the mineral layer having a thickness between about 50 angstroms and about 2000 angstroms.
 25. The method of claim 20, wherein forming the mineral layer includes sputtering the mineral layer on a clean surface of the metallic plate.
 26. The method of claim 20, wherein providing the metallic plate includes providing the metallic plate having a metallic substance selected from the group consisting of stainless steel, aluminum, titanium, copper, copper coated with nickel, and copper coated with chrome.
 27. The method of claim 20, wherein forming the adhesion promoter layer includes forming the adhesion promoter layer having an adhesion promoter selected from the group consisting of a titanate, a zirconate, and an aluminate.
 28. The method of claim 20, wherein forming the adhesion promoter layer includes forming the adhesion promoter layer having a silane from the group consisting of 3-glycidoxypropyltrimethoxysilane, 3-glycidoxypropyltriethoxysilane, 3-(2-aminoethyl)propyltrimethoxysilane, and 3-(2-aminoethyl)propyltrmethoxysilane.
 29. The method of claim 20, wherein interfacing the adhesive material between the adhesion promoter layer and the semiconductor chip comprises coupling a top surface of the adhesion promoter layer to a top surface of the semiconductor chip and to a top surface of the chip carrier.
 30. The method of claim 29, further comprising treating with silane both the top surface of the semiconductor chip and the top surface of the chip carrier prior to interfacing the adhesive material between the adhesion promoter layer and the semiconductor chip.
 31. The method of claim 20, wherein the adhesive material includes a structural epoxy adhesive.
 32. The method of claim 20, wherein a coefficient of thermal expansion (CTE) of the metallic plate exceeds a CTE of the semiconductor chip.
 33. The method of claim 20, further comprising provising a rigid thermoset encapsulating material disposed between the semiconductor chip and the chip carrier.
 34. The method of claim 20, further comprising attaching the chip carrier to a circuit card. 